Broad band microstrip n-pole m-throw pin diode switch having predetermined spacing between pole and throw conductors

ABSTRACT

The bandwidth characteristic of a microstrip N-pole M-throw switch is improved by providing the spacing, which is between a printed pole conductor and a printed throw conductor thereof and across which is connected a PIN diode to the two conductors, with a predetermined spacing relationship W 0.215 lambda /3, where lambda is the wavelength at the upper frequency of the bandwidth range of the switch. Further improvement of the bandwidth characteristic is provided by utilizing the inductances of bare wire conductors as chokes or as the inductive component of low pass LC filters that are used in the biasing of the switches.

United States Patent [1 1 Hume [ Nov. 20, 1973 [75] Inventor: Robert M.Hume, Vestal, NY.

[73] Assignee: International Business Machines Corporation, Armonk, NY.

[22] Filed: Dec. 11, 1972 [21] Appl. No.1 314,055

[52] US. Cl. 333/7 D, 333/81 A, 333/84 M [51] Int. Cl. H0lp 1/10 where lwavelength at frequency 58 Field of Search 333/7 R 7 D 81 A' thebandwidth range the Fmher imPmve' 3323/84 ment of the bandwidthcharacteristic is provided by utilizing the inductances of bare wireconductors as [56] References Cited chokes or as the inductive componentof low pass LC UNITED STATES PATENTS filters that are used in thebiasing of the switches. 3,475,700 10/1969 Ertel 333/7 D 10 Claims, 13Drawing Figures BEAM LEAD PIN DIODES 3,568,105 3/1971 Felsenheld 333/7 DX Primary Examiner-Paul L. Gensler Attorney-Norman R. Bardales et al.

[57] ABSTRACT The bandwidth characteristic of a microstrip N-poleM-throw switch is improved by providing the spacing, which is between aprinted pole conductor and a printed throw conductor thereof and acrosswhich is connected a PlN diode to the two conductors, with-apredetermined spacing relationship W 0.215A/3,

PAIENTEDuuv 20 I975 SHEET 1 [1F 6 FIG. 2

Sic

FIG. 1b FIG. 1

FIG. Io HGJc t. m FIG. 5

PAlENlinnuvzo ms 3.774.123

SHEET 30F 6 FIG. ib

PATENTED NUV 201973 SHEET 5 BF 6 FIG. Id

Pmiminuuvzoms 3.774.123

sum s 0F 6 BEAM LEAD PIN DIODES FIG. 7

l BROAD BAND MICROSTRIP N-POLE M-TI-IROW PIN DIODE SWITCH I-IALVINGPREDETERMINED SPACING BETWEEN POLE AND THROW CONDUCTORS BACKGROUND OFTHE INVENTION 1. Field of the Invention This invention relates tomicrostrip N-pole M-throw switches, where N and M are predeterminedintegers.

2. Description of the Prior Art The use of N-pole M-throw switches forswitching rf energy is well-known in the art and is particularlywellknown in microwave applications. The prior art devices usuallyincorporated these switches in conventional microwave cavity structures,as well as stripline and microstrip structures and/ or hybrids of theforegoing.

In these prior art devices, the switches generally included at least twospaced conductors designated pole and throw conductors, respectively. Anelectronic switch means, such as a diode, was coupled to the twoconductors in such a manner that when forward biased, i.e. conductive,the two conductors would be electrically connected and when reversebiased would be electrically disconnected. Hence, the switch withregards to these two conductors would be closed and opened,respectively. Heretofore in the prior art, the spacing provided betweenthe two conductors was to provide an electrical discontinuity intheelectrical circuit path of which the two conductors were part. Theprior art, as far as I am aware, did not provide a spacing relationshipbetween the'conductors to improve the bandwidth characteristic of theswitch and/or provide it with a broad band characteristic.

Some of these aforementioned prior art structures employed a PIN diodeas the switching element between the respective pole conductor and throwconductor of the switch. However, these aforementioned prior artstructures have certain disadvantages including a limited bandwidthcharacteristic.

For example, a known prior art device employs a conventional microwavecavity structure with the PIN diode chips located therein. This devicehas a frequency range of 0.5 to 12.4 GI-Iz. Moreover, the physicaldimensions and size associated with the microwave plumbing forimplementing the cavity structure limits the upper frequency of thebandwidth. Furthermore, these devices are readily subject to deformationand, hence, degradation of performance, and are not readily applicableto compact applications.

In still another prior art device, the switch is implemented'as a hybridof a conventional microwave cavity and stripline structures. The commonconductor of the switch is a conductive post, which may be cylindricalor planar. Orthogonally disposed on an end of the post are the otherconductors of the switch which are implemented in stripline form. TheseIasbmentioned conductors have their ends symmetrically spaced from thesides of the post in a radial manner. Connected to each of the radialconductors and the center conductive post is a PIN diode across the gapformed therebetween. The aforedescribed prior art structure has abandwidth characteristic with an upper frequency band limitation of GHz.Moreover,'bccause of the structure and the dimensions of the elements ofthe switch of the prior art device, the upper frequency of the bandwidthcharacteristic of the switch is limited. As in the previouslydescribedprior art device, the last-mentioned prior art device also is subject todeformation and, hence, misalignment between the switch conductiveelements. This results in degradation of its performance. It also is notreadily adaptable to applications requiring compact switches.Fabrication of these devices is also complicated and particularly ifintegrated circuit PIN diodes are utilized.

In still another prior art structure, a semiconductor substrate is usedto support the printed conductors of a strip line configured switch. Inthis last-mentioned prior art structure, the conductors are radiallydisposed about a center printed conductor also supported by thesemiconductor substrate. The center conductor is separated from theradially-disposed conductors by a few microns so as to provide a DCblocking gap between the two conductors. Beneath each radial printedeonductor there is located an integrated circuit PIN diode which isformed in the semiconductor substrate. It should be noted that the diodeis not located across the gap. In the particular prior art device, the Pregion is in electrical contact with the particular overlying printedconductor of the switch and the N region is in contact with the commonground layer located on the other surface of the semiconductor body. Theparticular radial conductors are a quarter wavelength of the operatingfrequency of the switch, which distance is measured from the point ofcontact with the P region of the diode with which it is associated andthe center conductor. As a consequence, these prior art devices have avery narrow bandwidth. Moreover, fabrication of these devices iscomplicated because of the processes involved in making the PIN diode asan integral part of the switch structure.

Still another prior art device, a microwave duplex switch, isimplemented in microstrip apparatus. It requires a semiconductormaterial of a given'conductivity type, e.g. N doped. It has a commonground plane layer on one of its major surfaces. On the opposite surfaceis formed three printed conductors associated with the switch. The threeconductors have a T-shaped configuration. A spacing is formed betweeneach side of the center conductor and an end of each horizontalconductor. A pair of surface-oriented PIN diodes are formed in theaforementioned opposite surface of the semiconductor body. Morespecifically, each diode has its P region beneath a small mutuallyexclusive portion of the center conductor with which it is in electricalcontact. The N region of each diode is disposed beneath the endportionof a mutually exclusive one of the two horizontal conductors with whichit is in electrical contact. The intrinsic region of each PIN diode,which is between the separated P and N regions of the particular diode,lies beneath one of the aforementioned spacings. This prior artstructure uses printed quarter wavelength chokes thereby resulting inthe device having a narrow bandwidth. The fabrication of the device iscomplicated since it requires formation of integrated PIN diodes andalignment of the printed circuit conductors therewith.

SUMMARY OF THE INVENTION It is an object of this invention to provide amicrostrip N-pole M-throw switch which has a wide band frequencycharacteristic.

It is still another object of this invention to provide a compactmicrostrip N-pole M-throw switch.

Still another object of this invention is to provide a microstrip N-poleM-throw switch which is rugged, simple, and easily constructed.

According to one aspect of this invention there is provided a microstripN-pole M-throw switch having a predetermined bandwidth, N and M beingfirst and second integers, respectively. The switch comprises a planardielectric substrate having first and second opposite surfaces. A planarmetallic ground planar layer is disposed on the first surface. Apredetermined number of printed circuit conductor means corresponding toone of the integers is disposed on the second surface. A predeterminednumber of printed circuit conductor means corresponding to the other ofthe integers is disposed also on the second surface. At least one of thefirst printed conductor means and at least one of the second printedconductor means have a spacing equal to W 0.215M3, where A is thewavelength of the upper frequency of the predetermined bandwidth. Adiscrete beam-lead surface-oriented PIN diode means is seriallyconnected to the last-mentioned ones of the first and second printedcircuit conductor means across the last-mentioned spacing.

The foregoing and other objects, features, and advantages of theinvention will be apparent from the following more particulardescription of the preferred embodiments of the invention, asillustrated in the accompanying drawing.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a diagram showing therelative juxtaposition of FIGS. Ia to 1d;

FIGS. Ia 1d are an enlarged plan view of circuit apparatus whichincludes preferred embodiments of the microstrip N-pole M-throw switchof the present invention FIG. 2 is an enlarged partial schematic view ofthe switch conductors of one of the preferred embodiments shown in FIG.la;

FIG. 3 is an enlarged partial schematic view of the switch conductors ofanother one of the preferred embodiments shown in FIG. lb;

FIGS. 4 and 5 are enlarged partial schematic views of the respectiveswitch conductors of still two other preferred embodiments shown in FIG.lb and 1c, respectively;

FIG. 6 is an enlarged partial schematic view of the switch conductors ofstill another embodiment of the I present invention;

FIG. 7 is an enlarged partial cross-sectional view taken along the line7-7 of FIG. lb;

FIG. 8 is a schematic circuit diagram of certain embodiments of thepresent invention, and

FIG. 9 is an enlarged partial schematic view of still another embodimentof the present invention.

In the figures, like elements are designated with the same referencecharacters.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIGS. la 1d,reference numeral 1 designates a flat planar dielectric substrate.Preferably, substrate 1 is a ceramic composition such as AI O A planarmetallic ground plane layer 2 is disposed on the lower surface ofsubstrate 1, cf. FIG. 7, such as for example, by a conventional vapordeposition process. Preferably, conductive layer 2 is a gold or goldalloy and is co-extensive with the lower surface of substrate 1. Forsake of explanation, there are provided in the apparatus of FIGS. la ld,eight microstrip single pole multi-throw switches of the presentinvention, the elements of each of which are described hereinafter ingreater detail. It should be understood, however, that substrate 1 andlayer 2 are part-of and common-to each of these eight switches.

Briefly, disposed on the upper and opposite parallel surface ofsubstrate 1 are the pole and throw conductors of the aforementionedeight switches, which conductors are designated by the referencecharacters P and T, respectively, for sake of clarity. For sake ofexplanation, respective portions of conductors P and T which areassociated with each of the aforementioned eight switches are outlinedin FIGS. la Id by respective rectangular dash line boxes or regionsdesignated by the reference characters I VIII. The conductors P and Tare formed on the upper surface of substrate 1 using conventionalprinted circuit techniques and are preferably gold or some otherappropriate conductor. The switches associated with regions I to V1 aresingle pole double throw, or simply SPDT, types. The switches associatedwith regions VII and VIII are single pole three, i.e. triple, throw, orSPTT types.

Before describing each of the eight switches in greater detail, for sakeof simplicity some-of the identical elements utilized in the apparatusof FIGS. la Id will be first'described. The apparatus includes ametallic chassis box 3 which is appropriately grounded as shownschematically in FIG. In at the point designated by reference numeral 4.For sake of explanation, the switches associated with regions I. VI, VIIand VIII are interconnected to form one channel designated A, cf. FIGS.la and 1c, and the switches associated with re-' gions II, III, IV, V,cf. FIGS. Ib and 1d are interconnected to form another channeldesignated B. Mounted in the box 3 are the substrate 1 with its layer 2being electrically connected to box 3 and, hence, to ground 4. Coaxialconnectors 5-12 are mounted in the side walls of box 3 in a protrudingmanner and their respective outer conductors are mounted inanon-insulated manner thereto and, hence, are connected to ground 4.Connectors 5-7 and connectors 9-11 serve as selectable rf inputconnections to channels A and B, respectively, and connectors 8 and 12serve as their respective rf output connections. Alternatively,connectors 5-7 and connectors 9-11 can serve as selectable rf outputconnections and connectors 8 and 12 as input connectors. For thispurpose, the inner conductors b of connectors 5-12 are connected tocertain conductors of certain switches as explained hereinafter.

Also mounted on the side walls of box 3 in an insulated and protrudingmanner are the noise filtercondensers 13-25. Connected to each of theouter electrode leads 0, which act as bias terminals, of condensers13-25 is a bipolar bias voltage source means for biasing the identicalPIN diodes hereinafter described of the microstrip switches as issubsequently explained. For sake of clarity, only the bias meansconnected to filter 14 is shown. The inner electrode leads of condensers13-25 are designated by the reference character d. Condensers 13-25suppress or filter extraneous electrical noise which may be present inthe bias source being connected thereto in a manner wellknown to thoseskilled in the art.

A plurality of plated through holes 26 are provided on the substrate 1for interconnecting the circuitry associated with its upper surface tothe ground layer 2 in a manner well-known to those skilled in the art.The reference character e is used to designate the conductive lands orpads of holes 26.

In addition, each throw conductor of the multi-throw switch haselectrically coupled to it a corresponding low pass LC filter comprisingthe inductance of a bare wire conductor and the capacitance of adiscrete chip type condenser. For sake of clarity, each such filter27-28 is designated in FIGS. la 1d by the combined reference charactersused for its constituent components, to wit, a bare wire conductor 27and a discrete capacitor 28. Each low pass LC filter 27-28 allows thebias voltage, which is applied to the particular one of the noise filtercondensers 13-25 with which it is associated, to bias ahereinafterdescribed particular associated PIN diode, or series-connected PINdiodes as the case may be, which is or are associated with a particularswitch without degradation to the rf energy being passed by theparticular switch. The inductances of conductors 27 thus serve as rfchokes and the capacitors 28 serve as bypass capacitors for rfshortingbias terminals c to ground. The DC bias voltage return for eachPIN diode, or series-connected PIN diodes as the case might be, isprovided by a series-connected bare wire conductor and one of the platedthrough holes 26 and which series-connected elements are electricallycoupled to the pole conductor of the particular associated switch. Theselast-mentioned bare wire conductors are designated with the commonreference characters 29 for sake of clarity. The inductances of the barewire conductors 29 serve as rf chokes. The characteristic impedance ofeach wier conductor 27 or 29 is selected to be greater, e.g. at leastfive times greater, than the characteristic impedance of the particularthrow or pole conductor to which it is connected. Preferably, the throwand pole conductors are provided with a conventional 50 ohmcharacteristic impedance in a manner well-known to those skilled in theart. The pole and throw conductors P and T are provided with the sameuniform width dimensions.

The SPDT microstrip switch associated with region I, cf. FIG. la, hasthree spaced signal printed circuit conductors 30, 31 and 32, which areits two throw and one pole conductors, respectively. FIG. 2 is anenlarged view of the conductors 31, 32, 33, the view of FIG. 2 beingoriented 90 counterclockwise with respect to the view of FIG. 1a. Theedges 30a, 31a of conductors 30 and 31 are disposed in a parallel andsymmetrical spaced relationship with the parallel sides 32b and 32c,respectively, of conductor 32. As a result, a pair of single gaps 33, 34of width W is formed. Gap 33 is between conductors 30 and 32 and gap 34is between the conductors 31 and 32. The value of spacing W is selectedin accordance with the principles of the present invention hereafterdescribed. Conductors 30-32 have, as aforementioned, uniform widthdimensions W1. In the embodiment of FIG. 2, the top sides 30b, 31b ofconductors 30 and 31 as viewed therein are substantially co-linearlyaligned with the edge 32a of conductor 32. Sides 30b and 31b areparallel to their respective opposite sides 30c and 31c.

Across each gap 33, 34 there is connected, e.g. by thermal compressionbonding, to the conductors 30, 31 and 32 an aforementioned beam-leadsurface-oriented PIN diode, i.e. diodes 35 and 36, cf. FIG. 1a. By wayof example, diodes 35 an 36 are poled such that their respective anodesare commonly connected to pole conductor 32, and their respectivecathodes are connected to throw conductors 30 and 31, respectively.

The SPDT microstrip switch associated with region lI, cf. FIG. Id, issimilar to the SPDT switch associated with region I. The SPDT switchassociated with region II includes three spaced printed circuitconductors 37,

38 and 39 which are its two throw and one pole conductors, respectively.The spacing and alignment as well as their respective width dimensionsof the conductors 37, 38 and 39 are identical to the correspondingparameters of their respective counterparts 30, 31 and 32 associatedwith the SPDT switch of region I. Across the spacings which are formedbetween the conductors 37 and 39 and conductors 38 and 39, there areprovided respective beam-lead surface-oriented PIN diodes 40, 41. Theanodes of the diodes 40, 41 are commonly connected to the conductor 39and their cathodes are connected to the conductors 37 and 38,respectively.

In each of the SPDT switches associated with regions I and II, two ofits conductors are in co-linear alignment and a third conductor isdisposed between and in orthogonal relationship with its two co-linearaligned conductors. In each of the SPDT microstrip switches associatedwith the regions III and IV, cf. FIGS. lb and 1d, the three conductorshave the same angular orientation and spacing alignment with respect toeach other, however, the orthogonal oriented conductor of the trio isoffset or displaced to one side of one of the two co-linearly alignedconductors and not in between.

More specifically, the SPDT switch associated with the region III, cf.FIG. lb, has three printed conductors 39, 42 and 43 which are its poleconductor P and its two throw conductors T, respectively. Conductors 39,42 and 43 are aligned such that conductors 39 and 42 are in a co-linearalignment. In addition, conductor 43 is orthogonal to the co-linearlyaligned conductors 39 and 42 but is offset or juxtaposed adjacent to oneside 39b of conductor 39, as shown in greater detail in FIG. 3, the viewthereof being oriented clockwise with respect to the view of FIG. lb.

As shown in FIG. 3, the aforementioned spacing W is provided betweenparallel edge 43a and side 39b of conductors 43 and 39, respectively.Likewise, the same spacing W is provided between edges 42a and 39a ofconductors 42 and 39, respectively. In the embodiment of FIG. 3, side43b is co-linearly aligned with edge 39a. In practice, conductor 43 maybe disposed orthogonally adjacent to the side 39b of conductor 39 withits side 43b being co-linearly aligned anywhere from the edge 390 downto the dash line 43b shown in FIG. 3. The spacing between edge 39a andline 43b is 3W, i.e. three times the dimension of spacing W. Conductor43, it should be understood, could be alternatively arranged on theopposite side 39c of conductor 39 or on side 42b or 42c of conductor 42,if desired, with similar orientation, spacing and alignmentrelationships being provided. It should be noted that conductor 39 iscommonly used for the pole conductors P of the SPDT switches associatedwith regions II and III. Across the spacings 44 and 45, cf. FIG. 3,between conductors 39 and 42 and conductors 39 and 43, respectively, aredisposed beam-lead surface-oriented PIN diodes 46 and 47, respectively,cf. FIG. 1b. The anodes of diodes 46 and 47 are commonly connected tothe conductor 39 and their respective cathodes are connected to theconductors 42 and 43, respectively.

The SPDT switch associated with the region IV, cf. FIG. M, is similarlyconfigured as the SPDT switch associated with region III. It has twospaced printed conductors 38 and 48 that are co-linearly aligned. Theoffset conductor 37 is spaced adjacent to one side of the conductor 48in an orthogonal manner. The spacings between and alignment, as well astheir respective width dimensions, of the conductors 37, 38 and 48 withrespect to each other are identical to the corresponding parameters oftheir similar respective counterparts 43, 42 and 39 of the SPDT switchassociated with region III. It should be noted that each of theconductors 37 and 38 is common to the SPDT switches associated withregions II and IV. Conductors 37 and 38 are the two throw conductors Tand conductor 48 is the pole conductor P of the SPDT switch associatedwith region IV.

Beam-lead surface-oriented PIN diodes 49, 50 are disposed across thespacings formed between conductors 38 and 48 and conductors 37 and 48,respectively. More specifically, the anodes of diodes 49, 50 arecommonly connected to conductor 48 and their respective cathodes toconductors'38 and 37, respectively.

In the SPDT switches associated with the regions I to IV only one PINdiode is used between each throw conductor T and pole conductor P of theparticular switch. In accordance with the the principles of the presentinvention, if it is desired to provide additional isolation between thethrow conductors and the pole conductor of the switch, additional PINdiodes may be provided. In each of the SPDT switches associated withregions V and VI, cf. FIGS. lb and la, respectively, such additionalisolation is provided between each respective throw conductor andrespective pole conductor of the particular switch.

More specifically, and as shown in greater detail in FIG. 4, the SPDTswitch associated with region V has two bi-segmented throw printedconductors 51-51A and 52-52A, which are co-Iinearly aligned andsymmetrically disposed on sides 42c and 42b, respectively, of its poleconductor 42. It should be noted that conductor 42 is common to theswitches associated with regions III and V, conductor 42 being a throwconductor T for the former and a pole conductor P for the latter. Edge42a of conductor 42 is co-linearly aligned with co-aligned sides 51b,51b, 52b, and 52b of the conductor segments 51, 51A, 52, 528,respectively. Each of the spacings 53-56 between segments 51 and 51A,segment 51A and conductor 42, conductor 42 and segment 52A, and segments52A and 52, respectively, are provided with the aforementioned value W.The longitudinal dimensions of segments 51A and 52A are eachapproximately twice, i.e. double, the aforementioned spacing W. Asaforementioned, the width dimensions of the conductor 42, and segments51, 51A, 52, 52A are the aforementioned dimension Wl.

Across each of the spacings 53-56 is provided an aforementioned PINdiode 57-60, respectively, cf. FIG. lb. Diodes 57 and 58 are poled inthe same direction and in a series-coupling relationship with eachother. Diodes 59-60 are also poled in the same direction and in aseries-coupling relationship with each other. More specifically, diode57 has its cathode and anode connected to segments 51 and 51A,respectively; diode 58 has its cathode and anode connected to segment51A and conductor 42, respectively; diode 59 has its anode and cathodeconnected to conductor 42 and segment 52A, respectively; and diode 60has its anode and cathode connected to segments 52A and 52,respectively.

Referring now to FIG. la, the angular orientation, spacing and alignmentrelationships of the two throw bi-segmented conductors 61-61A, 62-62A,and the pole conductor 30 of the SPDT switch associated with the regionVI are identical to their counterparts 51-51A, 52-52A and 42,respectively, of the SPDT switch associated with region V. Likewise, thebeamlead surface-oriented PIN diodes 63-66 are connected electrically tothe segments or conductors, asthe case may be, 61, 61A, 62, 62A, 30 astheir counterpart diodes 57-60, respectively, are connected to thecounterpart segments or conductors 51, 51A, 52, 52A, 42 of the switchassociated with region V. It should be noted that conductor 30 is commonto the switches associated with regions I and VI as a throw and poleconductor, respectively.

In the switch embodiments associated with the regions V and VI,symmetrical or balanced isolation is provided in each of the respectivethrow arms or conductors of each of these switches. It should beunderstood, however, that in certain cases asymmetrical isolation may beprovided. In the SPDT switches associated with the regions VII and VIII,cf. FIG. 10, asymmetrical isolation is provided as will be explained inthe following description.

Conductor 32, which is the pole conductor of the SPDT switch associatedwith region I, is also common to and is the pole conductor of the SPTTswitch associated with the region VII. The conductors of thislastmentioned SPTT switch are shown in greater detail in FIG. 5, theview of which is oriented 90 counterclockwise with respect to the viewof FIG. 1c. More specifically, it has two throw conductors 67, 68, and athird throw conductor that is part of trisegmented throw conductorA-70C, which is also common to and is-part of a throw conductor of theSPTT switch associated with region VIII, cf. FIG. 1c. Thus, as shown inFIG. 1c, segment 70A and one-half of common segment 70B forms a throwconductor associated with the switch of region VII; and the segment 70Cand the other half of the common segment 708 form a throw conductor theswitch associated with the region VIII.

Referring again to FIG. 5, throw conductors 67, 68 are in co-linearalignment and the pole conductor 32 is symmetrically disposedorthogonally to the co-aligned conductors 67, 68 and in between theiredges 67a and 68a, respectively. Edge 32a of conductor 32 is coalignedwith the edges 67b and 68 b of conductors 67, 68. Conductor segments70A, 70B, as well as segment 70C, and conductor 32 are also aligned withrespect to each other. The gaps 71, 72, 73, 74 between conductors 67 and32, 32 and 68, 32 and 70A, and 70A and 708, respectively, have theaforementioned spacing W. Conductors 67, 68, 32, and segments 70A, 70B,and 70C have the aforementioned width dimension WI. The respectivelongitudinal dimensions of the segments 70A, 70B and 70C, are each twicethe respective spacing W, that is, they are each 2W.

Beam-lead surface-oriented diodes 75-78, cf. FIG. 1c, are providedacross the spacings 71-74 respectively. The anodes of diodes 75, 76, and77 are commonly connected to the conductor 32, and their respectivecathodes are connected to the conductors 67, 68 and 70A, respectively.Diode 78 is poled in the same direction as diode 77. That is to say, theanode and cathode of diode 78 are connected to the segments 70A and 708,respectively. Diodes 77 and 78 provide double the isolation in throwconductor arms 70A-'70B. Only single isolation is provided in each ofthe other throw arms 67 and 68 by their. respective associated diodes75, 76. Accordingly, the switch associated with region V11 has theaforementioned asymmetrical isolation.

Conductors 67 and 68 are also common to the SPTT switch associated withthe region Vlll, cf. FIG. 1c. These conductors 67 and 68 are two of thethree throw conductors of .this last-mentioned switch. The third throwconductor to this switch is formed by the aforementioned segment 70B and70C, segment 708 being common to the other switch associated with regionVll as previously explained. The conductor 79 is the pole conductor ofthe switch associated with the region V111. Conductors 67, 68, 70B-70C,79 of the SPTT switch associated with region Vlll have angularorientation, spacing and alignment relationships with respect to eachother which are identical to the corresponding parameters of and are themirror symmetry of their respective counterparts 67, 68, 70A-70B, 32 ofthe switch associated with region VII. The beam-lead surface-orienteddiodes 80-83 are poled in the same manner as their respectivecounterparts 75, 76, 77, 78, respectively. That is to say, therespective anodes of diodes 80-82 are commonly connected to theconductor 79, and their respective cathodes are connected to theconductors 80, 81 and 70C, respectively. Diode 83 has its cathode andanode connected to the segments 70B and 70C, respectively.

The operation of the apparatus shown in FIGS. la 1d will now bedescribed. Under quiescent conditions, the switches associated with theregions l-Vlll are normally turned off. This is accomplished byproviding a reverse-bias across each of the PIN diodes of the variousswitches. For the particular manner in which these diodes are poled,appropriate positive voltages are applied to the electrodes 6 of thenoise filter condensers 13-25 to provide the reverse bias. To turn onone of the switches, the PIN diode, or diodes as the case may be, thatconnects the particular throw conductor T and pole conductor P desiredto be switched on, is or are as the case may be forward-biased. This maybe accomplished by selectively providing an appropriate negative voltageto the appropriate electrode c. 'As a result of the forward-biasing, theconductive path between the associated pole and particular throwconductor is completed. This allows the rf signal energy, if present, tobe passed by the particular switch between its two so connectedconductors. This will become more apparent from the more detaileddescription hereinafter.

Referring now to the operation of channel A, under quiescent conditionsaforementioned appropriate positive voltages are applied to theelectrodes of filters 13-19 through suitable respective biasingnetworks. For sake of clarity, only the biasing network 84 used to biasthe diode 36 of the switch associated with region I, is ShOWlL'Rincludes a suitable power supply and switching means shown schematicallyas battery 85 and SPDT switch 86. Switch means 86 is preferably of theelectronic type. By closing the arm of the switch 86 with its respectivecontacts R, the positive terminal of battery 85 is connected to theelectrode 0 of filter 14 and its negative terminal is grounded withrespect to the common ground 4. As a result, a positive voltage isapplied to the electrode c and hence, to the cathode of diode 36 via theseries-connection of filter 14, insulated wire conductor 87, printedconductor 88, bare wire conductor 27, and printed conductor 31. Theanode of diode 36 is connected to the negative terminal of battery 85 byvirtue of its connection to printed conductor 32, bare wire conductor29, plated through hole 26, and ground layer 2 which as aforementionedis connected to the common ground 4. As a result, diode 36 isreverse-biased and hence, any rf signal present at coaxial connector 7cannot be transmitted from the conductor 31 to the conductor 32 and viceversa. To place a forward bias across diode 36 so as to connectconductors 31 and 32, the arm of switch 86 is closed on its contacts F.

The other biasing networks similar to the biasing network 84 areconnected to the respective electrodes c of filter 13, 15 to 19. Thebiasing network applied to the electrode 0 of filter 13 provides thebiasing voltages for the series-connected diodes 63 and 64 of the switchassociated with the region V1 and also to the diode 35 of the switchassociated with the region I. The connection of series-connected diodes63, 64 and 35 to the lastmentioned biasing network is by means of thefilter 13, insulated wire conductor 89, printed conductor 90, bare wireconductor 27, printed conductor 61, diode 63, printed conductor segment61A, diode 64, printed conductor 30, diode 35, printed conductor 32,bare wire conductor 29, plated through hole 26, layer 2 and from thereto the common ground 4.

In a similar manner, the biasing network associated with theseries-connected diodes 65, 66 and 35 is connected thereto by means offilter 19, insulated wire conductor 91, printed conductor 92, bare wireconductor 27, printed conductor 62, diode 66, printed conductor segment62A, diode 65, printed conductor 30, diode 35, printed conductor 32,bare wire conductor 29, plated through hole 26, layer 2 and from thereto the common ground 4. Applying an appropriate negative voltage to theelectrode 0 of filter 13, diodes 63, 64 and 35 become forward-biasedthereby placing conductors 61 and 30 and conductors 30 and 32 inelectrical connection. As a result, rf signals, if present at connector6 can be transmitted through the conductor 32 and vice versa.

In a similar manner, if an appropriate negative voltage is applied tothe electrode 0 of filter l9, diodes 66, 65 and 35 become forward-biasedand any rf signal at connector 5 will be transmitted via theelectriallyconnected conductors 62, 30 and 32, or vice versa. It shouldbe understood that a forward-biased voltage would be selectively appliedto one of the respective electrodes c of filters 13, 14 or 19 so as toprovide the selective electrical connection of one of the conductors 61,62, 31 to conductor 32.

In a similar manner, diode of the switch associated with region Vllisbiased by a biasing network which is connected to electrode 0 offilter 15. This same lastmentioned biasing network also biases the diodeof the switch associated with the region Vlll. More specifically, thelast-mentioned biasing network is connected to the filter 15, insulatedwire conductor 92, printed conductor 94 and from there to two branchcircuits. One branch circuit comprises the series-connected bare wireconductor 27, printed conductor 67, diode 75, printed conductor 32, barewire conductor 29, plated through hole 26 and from there to the layer 2and hence, common ground 4. The other branch circuit includes theseries-connected are wire conductor 27, printed conductor 67, diode 80,printed conductor 79, bare wire conductor 29, plated through hole 26,and from there to layer 2 and the common ground 4.

Diode 76 is biased by a biasing network connected to the electrode c offilter 18. More specifically, the lastmentioned biasing network isconnected to seriesconnected filter 18, insulated wire conductor 95,printed conductor 96, bare wire conductor 27, printed conductor 68,diode 76, printed conductor 32, bare wire conductor 29, plated throughhole 26, and from there to the commonly grounded layer 2.Seriesconnected diodes 77, 78 of the switch associated with the regionVll, have a biasing network which is connected as follows: filter 16,insulated wire conductor 97, printed conductor 98, bare wire conductor27, printed circuit conductor segment 70B, diode 78, printed circuitconductor segment 70A, diode 77, conductor 32, bare wire conductor 29,plated through hole 26, and from there to the commonly grounded layer 2.The last-mentioned biasing network also provides bias forseries-connected diodes 83 and 82 of the switch associated with regionVlll via filter 16, insulated wire conductor 97, printed conductor 98,bare wire conductor 27, segment 70B, diode 83, segment 70C, diode 82,printed conductor 79, bare wire conductor 29, plated through hole 26 andfrom there to layer 2 and the common ground 4. The diode 81 of theswitch associated with region VIII is biased by a biasing network whichis connected to the filter 17, which in turn is connected to thefollowing series-connected elements, insulated wire 99, printedconductor 100, bare wire conductor 27, conductor 68, diode 81, printedconductor 79, bare wire conductor 29, plated through hole 26, and from'there to the layer 2 and common ground 4.

Connected across the throw arm 67 and the elongated common pad e of theseries of five plated through holes 26 shown thereat, are a pair ofdiscrete attenuation networks 101 of the discrete chip type, each havinga predetermined attenuation value, e.g. 20 decibels. An identicaldiscrete attenuation network 101 is also connected across the printedconductor 68 and elongated pad e of the plated through holes 26 shownthereat. Another such attenuation network 101 is connected across theconductor 37 of the switches associated with regions ll and 1V, cf. FIG,1d and the elongated common pad e of the five plated through holes 26shown thereat.

By applying a negative voltage to the electrode c of filter l6, diodes77-82 are forward-biased and conductor 32 is electrically connected 'tothe conductor 79. Applying a positive voltage to the electrode c offilter l5 on the other hand, will forward-bias both diodes 75 and 80 andconsequently, conductor 32 is electrically connected to conductor 67 andconductor 67 will be electrically connected in turn to conductor 79.

Conductor 32 is electrically connected to conductor 79 via conductor 68by applying a negative voltage to both electrodes 0 of the filters 17,18 which forwardbiases diodes 76 and 81 simultaneously, therebyelectrically connecting conductor 32 to conductor 68. Conductor 68 inturn is connected electrically to conductor 79. In operation, to connectconductor 32 electrically to conductor 79 via conductor 67, 68 or thetrisegmented conductor 70A-70C, a negative voltage is appliedexclusively to the appropriate one of the respective electrodes 0 offilters l5, l7 and 18, 16, respectively.

For the aforementioned decibel example of the networks 101, the SPTTswitches associated with regions VII and VIII coact to allow the rfsignal being passed between conductors 32 and 79 to have zero or 20 or40 decibels of attenuation depending upon whether diodes 7778 and 8283,or diodes 76 and 81, or diodes and are forward-biased respectively.

Referring now to the operation of channel B, under quiescent conditions,as aforementioned, the respective electrodes c of filters 20-25 haveapplied thereto appropriate positive bias voltages from suitable powersupplies, not shown in FIGS. lb-ld for sake of clarity. As a result, therespective PlN' diodes of the switches associated with channel B arereverse-biased and the corresponding switches are hence, in an open orturned-off condition.

In FIG. 8 there is shown in greater detail a schematic representation ofthe biasing and switching network and the circuitry of the switchassociated with the region V. Biasing and switching network 102 has aDPDT schematically shown switch 102A which when closed with its contactsR allows the positive voltage from the battery 102B to be applied to theelectrode 0 of the filter 20. More specifically, under these connectionsthe positive terminal of battery 1028 is connected to electrode c offilter 20 and through the series-connected following elements: filter20, insulated wire conductor 103, printed conductor 104, bare wireconductor 27, printed conductor 51, diode 57, printed conductor segment51A, diode 58, printed conductor 42, diode 46 of the switch associatedwithh region lll, printed conductor 39, bare wire conductor 29, platedthrough hole 26, layer 2, and from layer 2 back to the negative terminalof battery 1023 through the common ground connection, cf. FIGS. la-lband FIG. 8. As such, the diodes 57, 58 and 46 are reverse-biased. Byplacing the switch 102A in closed position with its contacts F, diodes57, 58 and 46 become forward-biased causing conductor 51 to beelectrically connected to conductor 42 and the latter to be electricallyconnected to conductor 39. I

In a similar manner switching network 102', which includes aschematically shown DPDT switch 102a and power supply 10212, iselectricallyconnected to the series-connected elements, filter 25,insulated wire conductor 105, printed conductor 106, bare-wire conductor27, printed wire conductor 52, diode 60, printed conductor segment 51A,diode 59, printed conductor 42, diode 46, printed conductor 39, barewire conductor 29, plated through hole 26, layer 2, and back to thenetwork 102' through a common ground connection, cf. FIGS. 1a-1b andFIG. 8. Thus, switch 102a provides reverse and forward bias to thediodes 46, 59 and 60, thereby providing electrical disconnection andconnection, respectively, between the conductors 52 and 42 and betweenconductors 42 and 39. In FIG. 8, for sake of clarity, bare wireconductors 27 and 29 are represented schematically by their inductiveimpedances.

The other diode 47 of the switch associated with region 111 is biased bya biasing network which is connected to it via the series-connectedelements to wit:

filter 24, insulated wire 105A, printed conductor 106A, bare wireconductor 27, printed conductor 43, and from there to the diode 47. Thereturn path includes the series-connected printed conductor 39, barewire conductor 29, plated through hole 27, layer 2 and from there backto the bias network via the common ground connection.

Diode 41 of the switch associated with region 11, cf. FlG. 1d, is biasedby a biasing network, not shown, which is applied to the electrode c offilter 21. The connection is affected through the filter 21 andseriesconnected elements as follows: insulated wire conductor 107,printed conductor 108, bare wire conductor 27, printed conductor 37,diode 41, printed conductor 39, bare wire conductor 29, plated throughhole 26, layer 2, and from there back to the biasing networks via thecommon ground connection. The other diode 40 of the switch associatedwith region I] is biased by a biasing network that is connected tofilter 23, and from there to insulated wire conductor 109, printedconductor 110, bare wire conductor 27, printed conductor 38, diode 40,printed conductor 39, bare wire conductor 29, plated through hole 26,layer 2, and from there back to the biasing network through a commonground connection. Hence, with appropriate negative and positivevoltages applied to the respective electrodes of filters 21 and 23,respectively, and electrical connection is provided between conductor 39and 37 and not between conductor 39 and conductor 38, respectively. Ifthe aforementioned voltage polarity being applied to the electrodes c offilters 21 and 23 are reversed, then conductor 39 is electricallyconnected to conductor 38 but not to conductor 37.

The biasing network which biases the diode 40 of the switch associatedwith region ll is also used to provide the bias for the diode 49 of theswitch associated with the region IV. The biasing arrangement isconnected to the aforementioned series-connected elements of filter 23,conductors 109, 110, 27, 38, diode 49, and from there to conductor 48,bare wire conductor 29, and plated through hole 26, layer 2, and fromthere back to the biasing network through the common ground connection.As a consequence, when a forward-bias voltage is applied to electrode offilter 23, diodes 40 and 49 will be forward-biased concurrently and theconductors 39, 38 and 48 will be electrically connected. Positive biasvoltage applied to the electrode c of filter 23 reverse-biasesconcurrently the diodes 40 and 49 resulting in the conductors 39, 38 and48 being electrically disconnected.

The other diode 50 of the switch associated with the region IV is biasedbya biasing network applied to the electrode 0 of filter 22. Electricalconnection takes place through the series-connected elements insulatedwire conductor 111, printed conductor 112, bare wire conductor 27,printed conductor 37, diode 50, printed conductor 48, bare wireconductor 29, plated through hole 26, ground layer 2, and from thereback to the biasing network through the aforementioned common groundconnection.

By judiciously applying the appropriate bias voltages to the appropriateelectrodes c of the filters 20-25, rf energy between connector 12 andone of the connectors 9-11 is passed by channel B with zero or 20decibel attenuation, as the case may be, depending upon if diodes 40 and49 or diodes 41 and 50 are forward biased, respectively.

In accordance with the principles of my inventive discovery, l havefound a critical spacing relationship W between the pole and throwconductors of an N-pole M-throw microstrip switch, where N and M areintegers. This spacing relationship W provides the particular switcliwith a substantially constant amplitude signal response characteristicover a wide frequency range, heretofore unknown in the art. The spacingrelationship W is expressed in the following equation:

where A is the wavelength at the upper frequency of the frequencybandwidth. In certain cases, the spacing W is provided between theshort, i.e. width, edges ofa particular pole conductor and a particularthrow conductor of the same particular switch. in other cases, thespacing W is provided between the edge of one and the elongated side ofthe other. For example, it may be between the edge of a particular throwconductor and the side of a particular pole conductor of a particularswitch, or alternatively between the edge ofa particular pole conductorand the side of a particular throw conductor of a particular switch. inthese latter cases, the particular conductor having its edge so spacedmay be disposed anywhere along the side of the other conductor from afirst position to a second position. In the first position, the side ofthe particular conductor, which has its edge so spaced, and whichlast-mentioned side is closest to the other conductors edge, isco-linearly aligned with the last-mentioned edge. In the secondposition, the last-mentioned side of the particular conductor is adistance equal to the product 3W from the lastmentioned edge. This waspreviously discussed with respect to the side 43b of conductor 43 andthe edge 39aof conductor 39 of the switch associated with region ill,of. FIG. 3. By way of further example, side 3112 of the conductor 31 maybe disposed anywhere along the side 32c of conductor 32 from theposition shown in FIG. 2 to a position indicated by the dash-line31bshown therein. Furthermore, in case where multiple PlN diodes areprovided in cascade, such as the cascaded diodes 57 and 58 or thecascaded diodes 59 and 60 of the switch associated with region V of FIG.lb or cascaded diodes 63 and 64 or cascaded diodes 65 and 66 of theswitch associated with region VI of FIG. la, or the cascaded diodes 77and 78, or 78 and 83, or 83 and 82 of the switches associated withregions VII and VIII of FIG. 1c, a center-to-center spacing between theparticular cascaded diodes is provided which is equal to the product 3W.

To further enhance the bandwidth characteristic of the switch, there isprovided a certain angular relationship a of the bare wire conductors27, 29 with respect to the planar surface of the particular printedconductors to which they are connected and the maintenance of theseconductors in this angular position for a certain minimum heightrelationship H, cf. FIG. 7. The height relationship H off the particularbare wire conductor is from its point of contact or connection with theparticular printed conductor to which it is connected to a point abovesaid connection, cf. FIG. 7. The optimum angular relationship a is to aminimum of 45. The height relationship H is approximately 0.100 t 0.030inches.

Presence of adverse signal interference is mitigated by configuring andconnecting the insulated wire conductors, e.g. conductor 87, so as notto directly pass over the printed conductors of the apparatus of FIG. 1,wherever possible.

One such SPDT microstrip switch built in accordance with the principlesof this invention had a substantially constant amplitude response for abandwidth of 9:1 with a bandwidth of 2 to 18 gigahertz.

In accordance with still other principles of my invention, the edge ofthe conductor associated with the gap having the aforementioned spacingW may be elongated to improved coupling between itself and the side oredge as the case may be of the other conductor which is associated withthe particular gap. For sake of clarity, there is shown in FIG. 4 indash-line form elongated extensions 113 to 116 which are provided on therespective left and right edges of printed conductor segment 51A andleft and right edges of the printed conductor segment 52A, respectively,as shown therein. The extensions 113-116 are extended adistance W1 aboveand below the top and bottom respective sides of the segments 51A and52A. The orthogonal other dimensions of the extensions 113 to 116 areeach 2W/3 as shown in FIG. 4. It should be understood that alternativelya similar extension could have been provided on the edge 51a of theconductor 51, associated with the gap 53, for example, in lieu of theextension 113. However, by providing both extension 113 and an oppositeextension on edge 51a even further coupling is enhanced.

Turning now to FIG. 6, there is partially shown a configuration for theprinted conductors of a single pole four throw microstrip switchutilizing the principles of the present invention. Each of the throwconductors 117 to 120 arespaced from the pole conductor 121 with theaforementioned spacing W. Across the gap formed between edge 117a andside 12lb of conductors 117 and 121 there is provided a beam-lead diodeconnecting the last two-mentioned conductors but omitted in FIG. 6 forsake of clarity. A beam-lead diode, not shown, is also provided acrosseach of the gaps formed between the edges 118a and 121a, between edges119a and 121a and between edge 120a and side 1210, the respectiveconductors 118 to 121. The four beam-lead surface-oriented PIN diodesare soconnected that the same type electrodes, e.g. their respectiveanode electrodes, are connected in common to the conductor 121 and theirother type electrodes are connected to individual ones of the conductors117 to 120.

Referring now to FIG. 9 there are partially shown the pole and throwconductors of a double-pole, doublethrow microstrip switch made inaccordance with the principles of the present invention. Shownschematically therein is the interconnecting circuitry to the biasingnetworks, not shown, used to bias the schematically shown beam-lead,surface-oriented PIN diodes associated with the switch. The biasingnetworks are connected to the electrodes c of the noise filters 122 to125. The noise filters in turn are connected to the LC filter network27-28'. Conductors 126 and 127 are the two pole conductors andconductors 128 and 129 are the two throw conductors of the DPDT switchof FIG. 9. Printed conductor segments 130 to 133 are provided betweenconductors 126 and 128, between conductors 128 and 127, betweenconductors 127 and 129, and between conductors 129 and 126,respectively.

Conductors 128 and 129 are co-linearly aligned with respect to eachother, and conductors 126 and 127 are co-linearly aligned with respectto each other. Conductors 128 and 129 are orthogonal to conductors 126and 127. A gap having the aforementioned spacing W is formed between theparallel adjacent edges of each conductor 126-129 and segment -133. Abeamlead surface-oriented PIN diode, i.e. diodes 134-141, is connectedacross each of the aforementioned gaps to the printed conductor andsegment associated with the particular gapsln addition, the spacingbetween the particular diodes of each diode pair 134-135, 136-137,138-139, and -141 is equal to the product 3W. By way of explanation, therespective anodes of the diodes 134-141 are connected to theirassociated conductors 126-129 and their respective cathodes areconnected to their associated segments 130-133. The return DC bias pathsare affected through the bare wire conductors 29.

In operation, under quiescent conditions, the diodes 134-141 arereverse-biased by applying a positive bias voltage to the electrodes 0.By applying a negative volt- 7 age to the electrode c of filter 122,diodes 140 and 141 become forward-biased thereby providing an electricalconnection between the conductor 129 and segment 133 and betweenconductor 126 and segment 133 and hence, between the conductors 129 and126. If concurrently, a negative bias voltage is applied to theelectrode c of filter 124 diodes 136 and 137 will become forward-biasedand hence, cause conductors 128 and 127 to be electrically connected.Under these condi- ,tions diodes 134, 135, 138 and 139 are maintainedreverse-biased and hence, there is no electrical connection effectedbetween conductors 126 and 128 or between conductors 127 and 129.

If on the other hand, negative bias voltages are applied to theelectrodes 0 of filters 123 and 125, exclusively, and the otherelectrodes 0 of filters 122 and 124 remain at the positive bias voltagelevels, then diodes 134, 135, 138 and 137 become forwardbiased and as aresult conductors 126 and 128 are electrically connected and conductors127 and 129 are electrically connected.

It should be understood that while the invention has been described inparticular preferred embodiments and preferred operational modes, thatthe invention could be practiced with other modifications and/oroperational modes. For example, the PIN diodes of the variousembodiments may be poled in a direction opposite to that previouslydescribed in which case appropriate negative and positive bias voltageswould be applied to the electrodes 0 to reverse bias and forward bias,respectively, the particular PINdiode.

It is to be further understood that the invention can be practiced forN-pole multi-throw microstrip switches where N is an integer greaterthan two.

Thus, while the invention has been particularly shown and described withreference to the preferred embodiments, it will be understood by thoseskilled in the art that the foregoing and other changes in form anddetail may be made therein without departing from the spirit and scopeof the invention.

I claim:

1. A microstrip N-pole M-throw switch having a predetermined bandwidth,N and M being integers, respectively, said switch comprising incombination:

a planar dielectric substrate having first and secon opposite surfaces,

a planar metallic ground plane layer disposed on said first surface,

N printed circuit conductor means disposed on said second surface,

beam-lead surface-oriented PIN diode serially connected to said firstand second elements across said second spacing, each of the two said PINdiodes being poled in the same direction with respect to each other, thespacing between the centers of said diodes being equal to the product 3X 0.2l5A/3. 5. A microstrip switch according to claim 3 wherein Mprinted circuit conductor means disposed on said 5 N 1 and M is greaterthan I, said first and second second Surface" predetermined numberscorresponding to said first at least one of Said p f conductor means andand second integers, respectively, and each of the at least one e Said MP conductor means remainder of the M said second printed conductorhavlng P 8 therebetween equal to means is spaced from said such oneprinted conwhere A is the wavelength at the pp r q y 10 ductor means ofsaid first printed conductor means of the predetermined bandwidth and bya respective mutuall l y exc usive other spacing a discrete beam-leadsurface-oriented PIN diode seriequal to id 0 215 /3 each, d

2: fiz t ggggd scfg of Such ones iiand said switch further comprisingadditional M 1 dismeans across Sal spaemgcrete beam-leadsurface-oriented PIN diodes each 2. A microstrip switch according toclaim 1 wherein 15 of Said M 1 diodes being serially connectezj to asaid one of said M printed circuit conductor means mutually exclusiveone of Said remainder M Second comprises first a second primed circuitconduc' printed conductor means and said such one N first $2:; d g f rtzd 'gsgliixgfdiiigiintgg printed conductor means across the respectivesaid other spacing therebetween. by Said and sald second element befng6. A microstrip switch according to claim 3 further spaced from saidfirst element by a second spacing comprising. ?:1 yz z guflflf ggsgsinganother discrete means for selectively biasing said PIN diode in for- ,rward and reverse modes, and 22:23::132255'25:2:2fg jlgggz z gigzsigx 25means for coupling said means for selectively biasing to said diode.second s acin each of the two said PIN diodes being p F ingthe samedirecfion with res ect to 7. A microstrip switch according to claim 6wherein each other the p g between the centerszf Said said such oneprinted conductor means of said first diodes g equal to the product 3 X0 215A printed circuit conductor means comprises first 3- A microstrip pM throw switch g a p l and second printed circuit conductor elements,determined bandwidth, N and M being first and second 23523 12 2221;fggzg gz lgg g itg g zzj integers, respectively, said switch comprisingin combip nation: circuit conductor means by said spacing, and said aplanar dielectric substrate having first and second Second element bemg.spaced from i first eleopposite surfaces ment by a second spacing equalto said 0.2l5k/3, a planar metallic ground plane layer disposed on saidfirst Surface said switch further comprising another discrete apredetermined first number of printed circuit conbeamgead igie i gsenany ductor means disposed on said second surface, said necte to an 2i e f g first number corresponding to one of said integers, 4O f i each9 Y I dlo es a predetermined second number of printed circuit bemg poledm the s ame dlrecuon respect F conductor means disposed on said secondsurface, f j' the spacmg between the centers of Sam said second numbercorresponding to the other of dlodes bemg equal to the product 3 XGlue/3' said integers, f at least one of said first printed conductormeans and means for selecuvely blasmg further b'asmg Sam at least one ofsaid Second primed conductor diodes ln concurrent forward bias andconcurrent means having a spacing therebetween equal to e 0215A, where Ais the wavelength at the upper 8. A microstrip switch accord ng to claim6 wherein frequency of the predetermined bandwidth, and N: 1 e M 15greater than q first i eecond P a discrete beam-lead surface-orientedPIN diode seridetermlf'led numbers eofl'espofidmg to 531d first e allyconnected to each of such ones of said first and second 8 P y: and eachof the fsecond primed conductor means acmss said sPacder of the M saidsecond printed conductor means is ing' spaced from said such one printedconductor means of 4. A microstrip switch according to claim 3 whereinsaid first p f conduetoemeans by a resPective said such one printedconductor means of said first exeluslve other Spaemg equal to Said 0215M3 printed circuit conductor means comprises first each, and and secondprinted circuit conductor elements, 531d Switch further eempl'lsmgi saidfirst element being spaced from said such one additional M i discretebeam-lead surface-oriented printed conductor means of said secondprinted PIN diodes, each 0f Said M l dlodes belng serlauy circuitconductor means by said spacing, and said connected to a mutuallyexclusive one of said resecond element being spacedfrom said firstelemain M Second printed Conductor means and ment by a second spacingequal to said 0.2l5A/3, said such one N first printed conductor meansand across the respective said other spacing therebesaid switch furthercomprising another discrete tween,

additional selective M l biasing means for selectively biasing mutuallyexclusive ones of said M l diodes in forward and reverse bias modes, and

3 ,774, 1 23 19 20 other coupling means for coupling each of saidseleccapacitor, said rfchoke being a bare wire conductor.

five M l biasing means to the Particular diode of 10. A microstripswitch according toclaim 9 wherein the M 1 diodes which the particular Ml biassaid rf choke and said bypass capacitor are connected mg meansbiases.

9. A microstrip switch according to claim 6 wherein to said diode as alow pass LC filtersaid coupling means comprises an rf choke and bypass

1. A microstrip N-pole M-throw switch having a predetermined bandwidth,N and M being integers, respectively, said switch comprising incombination: a planar dielectric substrate having first and secondopposite surfaces, a planar metallic ground plane layer disposed on saidfirst surface, N printed circuit conductor means disposed on said secondsurface, M printed circuit conductor means disposed on said secondsurface, at least one of said N printed conductor means and at least oneof said M printed conductor means having a spacing therebetween equal to0.215 lambda /3, where lambda is the wavelength at the upper frequencyof the predetermined bandwidth, and a discrete beam-leadsurface-oriented PIN diode serially connected to each of such ones ofsaid N and M printed conductor means across said spacing.
 2. Amicrostrip switch according to claim 1 wherein said one of said Mprinted circuit conductor means comprises first and second printedcircuit conductor elements, said first element being spaced from saidone of said N printed circuit conductor means by said spacing, and saidsecond element being spaced from said first element by a second spacingequal to said 0.215 lambda /3, and said switch further comprisinganother discrete beam-lead surface-oriented PIN diode serially connectedto said first and second elements across said second spacing, each ofthe two said PIN diodes being poled in the same direction with respectto each other, the spacing between the centers of said diodes beingequal to the product 3 X 0.215 lambda /3.
 3. A microstrip N-pole M-throwswitch having a predetermined bandwidth, N and M being first and secondintegers, respectively, said switch comprising in combination: a planardielectric substrate having first and second opposite surfaces, a planarmetallic ground plane layer disposed on said first surface, apredetermined first number of printed circuit conductor means disposedon said second surface, said first number corresponding to one of saidintegers, a predetermined second number of printed circuit conductormeans disposed on said second surface, said second number correspondingto the other of said integers, at least one of said first printedconductor means and at least one of said second printed conductor meanshaving a spacing therebetween equal to 0.215 lambda /3, where lambda isthe wavelength at the upper frequency of the predetermined bandwidth,and a discrete beam-lead surface-oriented PIN diode serially connectedto each of such ones of said first and second printed conductor meansacross said spacing.
 4. A microstrip switch according to claim 3 whereinsaid such one printed conductor means of said first printed circuitconductor means comprises first and second printed circuit conductorelements, said first element being spaced from said such one printedconductor means of said second printed circuit conductor means by saidspacing, and said second element being spaced from said first element bya second spacing equal to said 0.215 lambda /3, and said switch furthercomprising another discrete beam-lead surface-oriented PIN diodeserially connected to said first and second elements across said secondspacing, each of the two said PIN diodes being poled in the samedirection with respect to each other, the spacing between the centers ofsaid diodes being equal to the product 3 X 0.215 lambda /3.
 5. Amicrostrip switch according to claim 3 wherein N 1 and M is greater than1, said first and second predetermined numbers corresponding to saidfirst and second integers, respectively, and each of the remainder ofthe M said second printed conductor means is spaced from said such oneprinted conductor means of said first printed conductor means by arespective mutually exclusive other spacing equal to said 0.215 lambda/3 each, and said switch further comprising additional M - 1 discretebeam-lead surface-oriented PIN diodes, each of said M - 1 diodes beingserially connected to a mutually exclusive one of said remainder Msecond printed conductor means and said such one N first printedconductor means across the respective said other spacing therebetween.6. A microstrip switch according to claim 3 further comprising: meansfor selectively biasing said PIN diode in forward and reverse modes, andmeans for coupling said means for selectively biasing to said diode. 7.A microstrip switch according to claim 6 wherein said such one printedconductor means of said first printed circuit conductor means comprisesfirst and second printed circuit conductor elements, said first elementbeing spaced from said such one printed conductor means of said secondprinted circuit conductor means by said spacing, and said second elementbeing spaced from said first element by a second spacing equal to said0.215 lambda /3, and said switch further comprising another discretebeam-lead surface-oriented PIN diode serially connected to said firstand second elements across said second spacing, each of the two said PINdiodes being poled in the same direction with respect to each other, thespacing between the centers of said diodes being equal to the product 3X 0.215 lambda /3, and said means for selectively biasing furtherbiasing said diodes in concurrent forward bias and concurrent reversebias modes.
 8. A microstrip switch according to claim 6 wherein N 1 andM is greater than 1, said first and second predetermined numberscorresponding to said first and second integers, respectively, and eachof the remainder of the M said second printed conductor means is spacedfrom said such one printed conductor means of said first printedconductor means by a respective mutually exclusive other spacing equalto said 0.215 lambda /3 each, and said switch further comprising:additional M - 1 discrete beam-lead surface-oriented PIN diodes, each ofsaid M - 1 diodes being serially connected to a mutually exclusive oneof said remainder M second printed conductor means and said such one Nfirst printed conductor means across the respective said other spacingtherebetween, additional selective M - 1 biasing means for selectivelybiasing mutually exClusive ones of said M - 1 diodes in forward andreverse bias modes, and other coupling means for coupling each of saidselective M - 1 biasing means to the particular diode of the M - 1diodes which the particular M - 1 biasing means biases.
 9. A microstripswitch according to claim 6 wherein said coupling means comprises an rfchoke and bypass capacitor, said rf choke being a bare wire conductor.10. A microstrip switch according to claim 9 wherein said rf choke andsaid bypass capacitor are connected to said diode as a low pass LCfilter.